The present invention relates to semiconductor design technology, and more particularly to a semiconductor memory device having an input device.
In general, semiconductor memory devices include contacts, e.g., pads, for receiving a variety of external signals or outputting signals. The minimum number of pads required by semiconductor memory devices depends on the number of types of signals and externally supplied voltages which are defined in their specifications. Additionally, semiconductor memory devices generally include additional pads used for testing. These additional pads are used for monitoring internally generated voltages of the semiconductor devices or applying internal signals from the outside.
Hereinafter, an input device having pads in a semiconductor memory device, which receives/outputs signals, will be described in detail.
FIG. 1 illustrates a block diagram of a conventional semiconductor memory device having an input device.
Referring to FIG. 1, the conventional semiconductor memory device includes a command pad 11, a data pad 12, a reference voltage pad 13, a first buffer 22, a second buffer 24, and first to fourth test pads 14, 15, 16 and 17. The command pad 11 receives a command through an external pin. The data pad 12 receives/outputs data through an external pin, and the reference voltage pad 13 receives a reference voltage through an external pin. The first buffer 22 converts an output signal of the command pad 11 into an internal command INT_CMD having an internal voltage level on the basis of the reference voltage VREF. The second buffer 24 converts an output signal of the data pad 12 into an internal data INT_DQ having an internal voltage level on the basis of the reference voltage VREF. The first to fourth test pads 14, 15, 16 and 17 receive test signals from the outside.
Typically, the pads of the semiconductor memory device are classified into general pads 11, 12 and 13 and test pads 14, 15, 16 and 17. Here, the general pads 11, 12 and 13 input/output a signal through an external pin even after the device has been packaged. The test pads 14, 15, 16 and 17 are used for applying a signal or monitoring an internal signal only during a wafer test. Examples of the general pad include pads for inputting/outputting commands, data, addresses, internal voltages, and so forth.
During the wafer test, a signal is applied to a semiconductor memory device by allocating channels of an external device to each pad. Therefore, if the number of pads is small, a greater number of devices can be simultaneously tested in one external device. On the contrary, the increase in number of pads inevitably causes a chip size to be increased.